LC7130, LC7131, LC7135, LC7136 and LC7137 PLL Frequency Synthesizer

Overview

This 27 MHz band, PLL frequency synthesizer LSI chip is designed specifically for CB transceivers. The integrated circuit`s incorporates PLL circuitry and a controller for CB applications on a single CMOS chip.
This PLL-circuit use a 6 bit ROM programmable divide-by-N counter. The ROM-table is programmed from factory.

Pin	Name	Description
1	P1	Programmable input 1
2	P2	Programmable input 2
3	P3	Programmable input 3
4	P4	Programmable input 4
5	P5	Programmable input 5
6	P6	Programmable input 6
7	Test	Connect to GND
8	CH19	Called channel 19 when pins are HIGH
9	CH9	Called channel 9 when pins are HIGH
10	MC
11	RI	X-tal Input
12	RO	X-tal Output
13	GND	Ground
14	LD	Locked=HIGH Unlocked=LOW
15	PD	Phase Detector Output
16	AI	Loop filter Amplifier Input
17	AO	Loop filter Amplifier Output
18	Vcc	Positive Supply Voltage
19	F in	VCO Frequency Input
20	T/R	Transmit=LOW Receive=HIGH

Programming Chart for LC7130/LC7131/LC7132

Channel	RX Divided by	TX Divided by
1	3254	3345
2	3256	3347
..	....	....
22	3306	3397
..	....	....
40	3342	3433

NOTES:
1. 91-count upshift on TX provides 455kHz offset for receiver IF mixing.
2. Reference and Programmable Dividers use 5kHz steps.

Example of VCO Determination, Channel 1:
3254 x 5kHz = 16.270MHz (RX-Mode)
3345 x 5kHz = 16.725MHz (TX-Mode)

Programming Chart for LC7136/LC7137

Channel	RX Divided by	TX Divided by
1	3381	2760
2	3383	2761
..	....	....
40	3459	2799

NOTES:
1. Referency and Programmable Dividers use 5kHz steps.
2. TX VCO frequency is doubled to provide direct on-channel frequency.

Example of VCO Determination, Channel 1:
3381 x 5kHz = 16.905MHz (RX-Mode)
2760 x 5kHz = 13.800MHz (TX-Mode)
(13.800MHz x 2 = 27.600MHz + 1.25kHz tuned offset = 27.60125MHz)

This counter shows the number of hits since the 29th January 2000

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